Webinar Overview:

A best-of-both worlds solution for embedded systems

The combination of the widely acclaimed Arm® Cortex®-M MCU architecture with the performance of a Xilinx® FPGA provides more flexibility and greater scope for innovation in the creation of application-optimised designs.

Many Vivado® users are familiar with the Microblaze™ RISC processor. However, the Arm Cortex-M3 has a substantially different hardware architecture, with unique system integration aspects.

In this webinar we will examine the Cortex-M3 IP block and discuss its integration inside a Xilinx FPGA.

We will:

• Examine the two main system busses, their use model and restrictions
• Review the operations of the Nested Vectored Interrupt Controller (NVIC) and its interaction with a Wakeup Interrupt Controller (WIC)
• Examine the memory management operations along with invasive and non-invasive debugging features of the core.

Attendance is free of charge

If you have any queries, please contact webinars@doulos.com

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Related training available from Doulos:

• Developing with Arm Cortex-M »
• Developing with Arm Cortex-M ONLINE »
• View full Doulos training schedule »         

Please contact Doulos to schedule a public course to suit you, or to discuss onsite training.